Fine- and Coarse-Grain Reconfigurable ComputingStamatis Vassiliadis, Dimitrios Soudris Springer Science & Business Media, 2007. gada 24. sept. - 381 lappuses Fine- and Coarse-Grain Reconfigurable Computing gives the basic concepts and building blocks for the design of Fine- (or FPGA) and Coarse-Grain Reconfigurable Architectures. Recently-developed integrated architecture design and software-supported design flow of FPGA and coarse-grain reconfigurable architecture are also described. Part I consists of two extensive surveys of FPGA and Coarse-Grain Reconfigurable Architectures: The FPGA technology is defined, which includes architecture, logic block structure, interconnect, and configuration methods and existing fine-grain reconfigurable architectures emerged from both academia and industry. Additionally, the implementation techniques and CAD tools developed to facilitate the implementation of a system in reconfigurable hardware by the industry and academia are provided. In addition the features, the advantages and limitations of the coarse-grain reconfigurable systems, the specific issues that should be addressed during the design phase, as well as representative existing coarse-grain reconfigurable systems are explained. In Part II, case studies, innovative research results about reconfigurable architectures and design frameworks from three projects AMDREL, MOLEN and ADRES&DRESC, and, a new classification according to microcoded architectural criteria are described. Fine- and Coarse-Grain Reconfigurable Computing is an essential reference for researchers and professionals and can be used as a textbook by undergraduate, graduate students and professors. |
No grāmatas satura
1.–5. rezultāts no 90.
... Circuits Application – Specific Integrated Processor Custom Configured Unit Control Data Flow Graphs Coarse-Grain Reconfigurable Units Complex Instruction Set Computers Configurable Logic Block Cycles Per Instruction Data Dependency ...
... circuit designers to produce application-specific chips bypassing the time-consuming fabrication process. A FPGA can be seen as a set of reconfigurable blocks that communicate through reconfigurable interconnect. By using the ...
... circuit is implemented in an FPGA by programming each logic block to implement a small portion of the logic required by the circuit, and each of the I/O blocks to act as either an input pad or an output pad, as required by the circuit ...
... circuit, then the routing of the whole circuit becomes actually more difficult than on a two-dimensional array that provides more alternatives. It should be noted that contemporary FPGAs often employ combinations of the above ...
... circuit. By applying a high voltage, a physical change called fusing occurs. This results in an impedance of a few ... circuits, while the other transistors can be controlled using the select gates. The charge under the floating gate ...
Saturs
3 | |
A Survey of CoarseGrain Reconfigurable Architectures and | 60 |
Amdrel | 153 |
A CoarseGrain Dynamically Reconfigurable System | 181 |
Polymorphic Instruction Set Computers | 216 |
Architecture and Compiler for CoarseGrain | 255 |
A Taxonomy of FieldProgrammable Custom Computing Machines | 299 |
Index | 379 |
Citi izdevumi - Skatīt visu
Fine- and Coarse-Grain Reconfigurable Computing Stamatis Vassiliadis,Dimitrios Soudris Ierobežota priekšskatīšana - 2007 |
Fine- and Coarse-Grain Reconfigurable Computing Stamatis Vassiliadis,Dimitrios Soudris Priekšskatījums nav pieejams - 2008 |
Fine- and Coarse-Grain Reconfigurable Computing Stamatis Vassiliadis,Dimitrios Soudris Priekšskatījums nav pieejams - 2014 |