Fine- and Coarse-Grain Reconfigurable ComputingStamatis Vassiliadis, Dimitrios Soudris Springer Science & Business Media, 2007. gada 24. sept. - 381 lappuses Fine- and Coarse-Grain Reconfigurable Computing gives the basic concepts and building blocks for the design of Fine- (or FPGA) and Coarse-Grain Reconfigurable Architectures. Recently-developed integrated architecture design and software-supported design flow of FPGA and coarse-grain reconfigurable architecture are also described. Part I consists of two extensive surveys of FPGA and Coarse-Grain Reconfigurable Architectures: The FPGA technology is defined, which includes architecture, logic block structure, interconnect, and configuration methods and existing fine-grain reconfigurable architectures emerged from both academia and industry. Additionally, the implementation techniques and CAD tools developed to facilitate the implementation of a system in reconfigurable hardware by the industry and academia are provided. In addition the features, the advantages and limitations of the coarse-grain reconfigurable systems, the specific issues that should be addressed during the design phase, as well as representative existing coarse-grain reconfigurable systems are explained. In Part II, case studies, innovative research results about reconfigurable architectures and design frameworks from three projects AMDREL, MOLEN and ADRES&DRESC, and, a new classification according to microcoded architectural criteria are described. Fine- and Coarse-Grain Reconfigurable Computing is an essential reference for researchers and professionals and can be used as a textbook by undergraduate, graduate students and professors. |
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1.–5. rezultāts no 30.
... Reconfigurable Functional Unit Reduced Instruction Set Computers Reconfigurable Processing Unit Sum of Absolute Differences Switch Box Single Instruction Multiple Data SoCR SRAM SW/HW TP VLIW Sea of Computing Resources Static xv.
Stamatis Vassiliadis, Dimitrios Soudris. SoCR SRAM SW/HW TP VLIW Sea of Computing Resources Static Random Access Memory Software-Hardware Tile Processor Very Long Instruction Word Part I Chapter 1 A Survey of Existing Fine-Grain ...
... (SRAM) [1], antifuse [2], and non-volatile technologies. The choice of the programming technology is based on the computation environment in which the FPGA is used. The general model of an FPGA is shown in Fig. 1.1. The logic cell ...
... SRAM-based FPGAs there is no limit to the number of times the array can be reprogrammed. 1.2.3.1 SRAM In this method of programming, the configuration is stored in SRAM cells. When the interconnect network is implemented using pass ...
... SRAM method of programming offers the convenience of reusing a single device for implementing different applications by loading different configurations. This feature has made SRAM-based FPGAs popular in reconfigurable platforms, which ...
Saturs
3 | |
A Survey of CoarseGrain Reconfigurable Architectures and | 60 |
Amdrel | 153 |
A CoarseGrain Dynamically Reconfigurable System | 181 |
Polymorphic Instruction Set Computers | 216 |
Architecture and Compiler for CoarseGrain | 255 |
A Taxonomy of FieldProgrammable Custom Computing Machines | 299 |
Index | 379 |
Citi izdevumi - Skatīt visu
Fine- and Coarse-Grain Reconfigurable Computing Stamatis Vassiliadis,Dimitrios Soudris Ierobežota priekšskatīšana - 2007 |
Fine- and Coarse-Grain Reconfigurable Computing Stamatis Vassiliadis,Dimitrios Soudris Priekšskatījums nav pieejams - 2008 |
Fine- and Coarse-Grain Reconfigurable Computing Stamatis Vassiliadis,Dimitrios Soudris Priekšskatījums nav pieejams - 2014 |