Fine- and Coarse-Grain Reconfigurable Computing

Pirmais vāks
Stamatis Vassiliadis, Dimitrios Soudris
Springer Science & Business Media, 2007. gada 24. sept. - 381 lappuses

Fine- and Coarse-Grain Reconfigurable Computing gives the basic concepts and building blocks for the design of Fine- (or FPGA) and Coarse-Grain Reconfigurable Architectures. Recently-developed integrated architecture design and software-supported design flow of FPGA and coarse-grain reconfigurable architecture are also described.

Part I consists of two extensive surveys of FPGA and Coarse-Grain Reconfigurable Architectures:

The FPGA technology is defined, which includes architecture, logic block structure, interconnect, and configuration methods and existing fine-grain reconfigurable architectures emerged from both academia and industry. Additionally, the implementation techniques and CAD tools developed to facilitate the implementation of a system in reconfigurable hardware by the industry and academia are provided.

In addition the features, the advantages and limitations of the coarse-grain reconfigurable systems, the specific issues that should be addressed during the design phase, as well as representative existing coarse-grain reconfigurable systems are explained.

In Part II, case studies, innovative research results about reconfigurable architectures and design frameworks from three projects AMDREL, MOLEN and ADRES&DRESC, and, a new classification according to microcoded architectural criteria are described.

Fine- and Coarse-Grain Reconfigurable Computing is an essential reference for researchers and professionals and can be used as a textbook by undergraduate, graduate students and professors.

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Par autoru (2007)

S. Vassiliadis, Professor at Department of Computer Engineering at the TU Delft in The Netherlands is well known in the Reconfigurable Computing community.

D. Soudris, Professor at Department of Electrical and Computer Engineering at the Democritus University of Thrace in Greece is a successful Kluwer author

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