Embedded Computer Systems: Architectures, Modeling, and Simulation: 7th International Workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007, Proceedings
Stamatis Vassiliadis, Mladen Berekovic, Timo D. Hämäläinen
Springer, 2007. gada 30. aug. - 470 lappuses
Stamatis Vassiliadis established the SAMOS workshop in the year 2001an event which combines his devotion to computer engineering and his pride for Samos, the island where he was born. The quiet and inspiring northern mo- tainside of this Mediterranean island together with his enthusiasm and warmth created a unique atmosphere that made this event so successful. Stamatis V- siliadis passed away on Saturday, April 7, 2007. The research community wants to express its gratitude to him for the creation of the SAMOS workshop, which will not be the same without him. We would like to dedicate this proceedings volume to the memory of Stamatis Vassiliadis. The SAMOS workshop is an international gathering of highly quali?ed - searchers from academia and industry, sharing their ideas during a 3-day lively discussion.Theworkshopmeetingisoneoftwocolocatedeventstheotherevent being the IC-SAMOS. The workshop is unique in the sense that not only solved research problems are presented and discussed but also (partly) unsolved pr- lems and in-depth topical reviews can be unleashed in the scienti?c arena. C- sequently, the workshop provides the participants with an environment where collaboration rather than competition is fostered.
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Model and Validation of Block Cleaning Cost for Flash Memory
VLSI Architecture for MRF Based Stereo Matching
Resource Conflict Detection in Simulation of Function Unit Pipelines
A Modular Coprocessor Architecture for Embedded RealTime Image and Video Signal Processing
HighBandwidth Address Generation Unit
An IP Core for Embedded Java Systems
Parallel Memory Architecture for TTA Processor
A Linear Complexity Algorithm for the Generation of Multiple Input Single Output Instructions of Variable Size
Automated Power Gating of Registers Using CoDeL and FSM Branch Prediction
A Study of Energy Saving in Customizable Processors
LowPower Twiddle Factor Unit for FFT Computation
TradeOffs Between Voltage Scaling and Processor Shutdown for LowEnergy Embedded Multiprocessors
An AutomaticallyRetargetable TimeConstraintDriven Instruction Scheduler for Postcompiling Optimization of Embedded Code
Improving TriMedia Cache Performance by Profile Guided Code Reordering
A Streaming Machine Description and Programming Model
Mapping and Performance Evaluation for Heterogeneous MPSoCs Via Packing
Strategies for Compiling μTC to Novel Chip Multiprocessors
Image Quantisation on a Massively Parallel Embedded Processor
Stream Image Processing on a DualCore Embedded System
A New CoarseGrain Reconfigurable Array for High Throughput Multimedia Processing
FPGA Design Methodology for a WaveletBased Scalable Video Decoder
Evaluating Large SystemonChip on MultiFPGA Platform
Efficiency Measures for Multimedia SOCs
OnChip Bus Modeling for Power and Performance Estimation
A Framework Introducing Model Reversibility in SoC Design Space Exploration
Towards Multiapplication Workload Modeling in Sesame for SystemLevel Design Space Exploration
Trends in Low Power Handset Software Defined Radio
Design of a Low Power Presynchronization ASIP for Multimode SDR Terminals
Area Efficient Fully Programmable Baseband Processors
The Next Generation Challenge for Software Defined Radio
Design Methodology for Software Radio Systems
Power Efficient Cosimulation Framework for a Wireless Application Using Platform Based SoC
A Comparative Study of Different FFT Architectures for Software Defined Radio
Design of 100 muW Wireless Sensor Nodes on Energy Scavengers for Biomedical Monitoring
ToolAided Design and Implementation of Indoor Surveillance Wireless Sensor Network
System Architecture Modeling of an UWB Receiver for Wireless Sensor Network
An Embedded Platform with DutyCycled Radio and Processing Subsystems for Wireless Sensor Networks
A New Operating System for Time Critical WSN Applications
Review of Hardware Architectures for Advanced Encryption Standard Implementations Considering Wireless Sensor Networks
An Energy Efficient Topology Control for Wireless Sensor Networks
Alamitos algorithm application approach baseband Berlin Heidelberg 2007 block branch prediction Bruuns FFT circuit CoDeL compiler complexity components Computer Society Press configuration constraints core cosimulation cost decoder defined dynamic efficient embedded systems energy evaluation execution Flash memory FPGA frequency functional units graph hardware IEEE Computer Society implementation input interface iteration kernel latency layer LNCS mapping MAXMISOs microthreads module multimedia multiple operand operations optimization output overhead paper parallel memory parameters performance pipeline platform power consumption power estimation Proc processor proposed protocols radio real-time reconfigurable reduce resource retargetable RISC SAMOS scheduling scheme sensor node SIMD simulation Software Defined Radio stream synchronization SystemC SystemCFL Table target tasks technique Technology thread TinyOS topology TUTWSN twiddle factors values Vassiliadis vector VHDL VLIW Wireless Sensor Networks Xilinx µTC
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