Building ASIPs: The Mescal MethodologySpringer Science & Business Media, 2005. gada 28. jūn. - 350 lappuses An increasing number of system designers are using ASIP’s rather than ASIC’s to implement their system solutions. Building ASIPs: The Mescal Methodology gives a simple but comprehensive methodology for the design of these application-specific instruction processors (ASIPs). The key elements of this methodology are: Judiciously using benchmarking Inclusively identifying the architectural space Efficiently describing and evaluating the ASIPs Comprehensively exploring the design space Successfully deploying the ASIP This book includes demonstrations of applications of the methodologies using the Tipi research framework as well as state-of-the-art commercial toolsets from CoWare and Tensilica. |
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Saturs
Introduction and Motivation | 1 |
1 What is a Design Discontinuity? | 3 |
12 General Characteristics of Design Discontinuities | 6 |
2 The Current Environment for Design | 7 |
22 The Application Pull for Programmable Platforms | 12 |
32 Design through Intellectual Property IP Block Assembly | 13 |
The Next Design Discontinuity | 15 |
6 Makimotos Wave | 17 |
13 Complexity of the Exploration Process | 134 |
2 Optimization Strategy | 135 |
3 ObjectiveCost Functions and Metrics | 138 |
31 Primary Objectives | 139 |
33 Combined Metrics | 141 |
4 Methods for Evaluating a Single Design Point | 142 |
41 SimulationBased Evaluation | 143 |
42 Combination of Simulationbased and Analytical Methods | 145 |
7 Could We Be Wrong? | 18 |
72 When Will We Ever Know for Sure? | 21 |
9 A Methodology for ASIP Design | 23 |
Inclusively Identify the Architectural Space | 24 |
Comprehensively Explore the Design Space | 25 |
102 The Impact of Silicon Issues on ASIP Architecture Selection | 26 |
104 From ASIPs to Programmable Platforms | 27 |
The Mescal Methodology for Building ASIPs | 31 |
Judiciously Using Benchmarking | 33 |
1 Introduction | 34 |
2 A Benchmarking Methodology | 36 |
24 Precise Specification Method | 37 |
3 A Benchmarking Methodology for NPUs | 38 |
33 Measurement Specification | 44 |
41 Functional Specification | 45 |
42 Environment Specification | 46 |
43 Performance Measurement | 47 |
52 Choosing the Benchmarks | 48 |
53 Benchmarking Results for Intel IXP | 50 |
6 Related Work on Benchmarking | 52 |
7 Conclusion | 56 |
Inclusively Identifying the Architectural Space | 57 |
1 The ASIP Landscape | 58 |
12 Programmable Hardware Based ASIPs | 62 |
2 A Closer Look into SubSpaces | 63 |
22 Peripheral Design Space | 68 |
3 Network Processing Design Space | 73 |
31 Parallel Processing | 74 |
32 Special Purpose Hardware | 76 |
33 Memory Architectures | 78 |
35 Peripherals | 79 |
4 Conclusion | 82 |
Efficiently Describing and Evaluating the ASIPs | 85 |
1 Best Practice in ASIP Design | 86 |
12 Hardware Description Languages HDLs | 87 |
22 Tipis Implementation of the Design Principles | 88 |
3 The Tipi Design Flow | 89 |
Multiview Operationlevel Design Supporting the Design of Irregular ASIPs | 90 |
32 Generating Fast BitTrue CycleAccurate Simulators for Programmable Architectures | 99 |
4 Tipi Case Study | 109 |
42 Simulator Generation | 112 |
422 Channel Encoding Processor | 113 |
5 Designing Memory Systems with Tipi | 114 |
51 Memory Design Space Element Library | 115 |
52 Simulator Generation Flow | 116 |
53 Memory Domain | 117 |
54 MultiPE Domain | 119 |
55 Memory Domain Translation | 120 |
56 Related Memory Design Frameworks | 126 |
6 Designing Interconnects in Tipi | 127 |
7 Designing Coprocessors and Peripherals in Tipi | 128 |
8 Conclusion | 129 |
Comprehensively Exploring the Design Space | 131 |
1 Introduction | 132 |
12 Evaluating Designs | 133 |
43 Purely Analytical Approaches | 146 |
5 Methods for Exploring the Design Space | 148 |
6 Support for Design Space Exploration in Tipi | 155 |
62 Memory Subspace | 156 |
7 Conclusion | 176 |
Successfully Deploying the ASIP | 179 |
1 Deployment Requirements on Design Tool Flow | 180 |
11 Support for Successfully Deploying Architectures in Tipi | 181 |
12 Improving the Programmers View | 185 |
Network Processing | 191 |
A Programming Model for the Intel IXP1200 | 192 |
22 Automated Task Allocation on Single Chip Hardware Multithreaded Multiprocessor Systems | 215 |
3 Conclusion | 224 |
Using Commercial Tools to Apply the Mescal Methodology for Building ASIPs | 227 |
Designing and Modeling MPSoC Processors and Communication Architectures | 229 |
1 Benchmarking the Application Requirements | 230 |
2 The Architectural Design Space | 235 |
3 ASIP Design Based on ADLs | 236 |
32 The ADL Approach | 237 |
4 The LISA Processor Design Platform | 238 |
41 The LISA Language | 240 |
42 Architecture Exploration | 241 |
43 Automatic Architecture Implementation | 243 |
44 Application Development Software Tools | 245 |
45 System Integration | 250 |
5 ASIP Verification | 251 |
51 Automatic Generation of Test Vectors from LISA Descriptions for Instruction Set Verification | 254 |
52 Genesys | 255 |
6 ASIP Design Case Studies | 257 |
Improving Existing Architectures | 263 |
7 Modeling Interconnects of an MPSoC | 271 |
From Timed to Cycle Accurate | 272 |
73 CoSimulation and System Simulation | 273 |
74 The SystemC Library | 274 |
81 Overview | 275 |
82 NoC Exploration Methodology | 276 |
83 Unified Modeling of OnChip Communication | 277 |
84 Network Engine Algorithms | 279 |
Commercial Configurable Processors and the Mescal Approach | 281 |
1 The Tensilica Approach to ApplicationSpecific InstructionSet Processors | 282 |
Judiciously Using Benchmarking | 285 |
22 ApplicationSpecific Benchmarking | 294 |
Inclusively Identifying the Architectural Space | 295 |
Efficiently Describing and Evaluating the ASIPs | 296 |
Comprehensively Exploring the Design Space | 297 |
51 XPRES Techniques for Performance Optimization | 300 |
Successfully Deploying the ASIP | 301 |
61 Towards MPSoC Deployment | 302 |
62 FlowThrough Processing | 308 |
Further MPSoC Progress | 310 |
Acronyms | 313 |
References | 319 |
343 | |
Citi izdevumi - Skatīt visu
Building ASIPs: The Mescal Methodology Matthias Gries,Kurt Keutzer Priekšskatījums nav pieejams - 2010 |
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